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Up to 1-GHz Arm® Cortex®-A7, MIPI Camera, Dual Ethernet, Audio and Security
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Product Pages
SAMA7G54
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6
Image Subsystem
6.2
Camera Serial Interface (CSI)
6.2.6
Functional Description
6.2.6.1
D-PHY Operating Modes
6.2.6.1.4
Active Modes
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
6.1
Overview
6.2
Camera Serial Interface (CSI)
6.2.1
Description
6.2.2
Embedded Characteristics
6.2.3
I/O Lines Description
6.2.4
Block Diagram
6.2.5
Product Dependencies
6.2.6
Functional Description
6.2.6.1
D-PHY Operating Modes
6.2.6.1.1
Power-Up Mode
6.2.6.1.2
Shutdown Mode
6.2.6.1.3
Analog Initialization
6.2.6.1.4
Active Modes
6.2.6.1.4.1
Control Mode
6.2.6.1.4.2
High-Speed Data Reception Mode
6.2.6.1.4.3
Escape Mode
6.2.6.2
Supported Resolutions and Frame Rates
6.2.6.3
Descrambler
6.2.6.4
Interrupts
6.2.6.5
Error Detection
6.2
Register Summary
6.3
CSI-2 Demultiplexer Controller (CSI2DC)
6.4
Image Sensor Controller (ISC)
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
6.2.6.1.4 Active Modes
