3.2.4 I/O Lines Description

Table 3-1. I/O Lines Description
NameDescriptionTypeActive Level
SMCKStatic Memory Controller ClockOutput
NCS[4:0]Static Memory Controller Chip Select LinesOutputLow
NRDRead SignalOutputLow
NWR0/NWEWrite 0/Write Enable SignalOutputLow
A0Address Bit 0Output
NBS0Byte 0 Select SignalOutputLow
NWR1/NBS1Write 1/Byte 1 Select SignalOutputLow
A[25:0]Address BusOutput
D[15:0]Data BusI/O
NWAITExternal Wait SignalInputLow
NANDRDYNAND Flash Ready/BusyInput
NANDWENAND Flash Write EnableOutputLow
NANDOENAND Flash Output EnableOutputLow
NANDALENAND Flash Address Latch EnableOutput
NANDCLENAND Flash Command Latch EnableOutput
NANDCSNAND Flash Chip SelectOutput