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SAMA7G54
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10
USB Subsystem
10.4
USB Device High Speed Port (UDPHS)
10.4.6
Functional Description
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
10.1
Overview
10.2
USB Type-C™ Port Controller (TCPC)
10.3
USB 2.0 PHY
10.4
USB Device High Speed Port (UDPHS)
10.4.1
Description
10.4.2
Embedded Characteristics
10.4.3
Block Diagram
10.4.4
Typical Connection
10.4.5
Product Dependencies
10.4.6
Functional Description
10.4.6.1
USB V2.0 High Speed Device Port Introduction
10.4.6.2
USB V2.0 High Speed Transfer Types
10.4.6.3
USB Transfer Event Definitions
10.4.6.4
USB V2.0 High Speed BUS Transactions
10.4.6.5
Endpoint Configuration
10.4.6.6
DPRAM Management
10.4.6.7
Transfer With DMA
10.4.6.8
Transfer Without DMA
10.4.6.9
Handling Transactions with USB V2.0 Device Peripheral
10.4.6.10
Speed Identification
10.4.6.11
USB V2.0 High Speed Global Interrupt
10.4.6.12
Endpoint Interrupts
10.4.6.13
Power Modes
10.4.6.14
Test Mode
10.4
Register Summary
10.5
USB Host High Speed Port (UHPHS)
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
10.4.6 Functional Description
