7.2.6.15.2 Monitors and Reports

When register write protection is enabled, any incorrect access is reported in I2SMCC_WPSR.WPVS and in I2SMCC_ISRB.WERR. It is possible to trigger an interrupt by writing a ‘1’ in I2SMCC_IERB.WERR.

When an error is reported, it is possible to trigger an interrupt by writing a ‘1’ in I2SMCC_IER.SECE.