Document |
The content for the devices described in this document has been
restructured from:
- ATtiny1614 Data
Sheet
- ATtiny1616/3216
Data Sheet
- ATtiny1617/3217
Data Sheet
to:
- ATtiny1614/1616/1617 Data Sheet
- ATtiny3216/3217 Data Sheet (this document)
Refer to 41.2 Appendix - Obsolete Revision
History for further details.The following
items are referring to changes between the latest revisions of the
obsolete documents and this document:
- Updated the
document to Microchip editing standard
- Removed related
links
- Removed the
Acronyms and Abbreviations section
- Removed the
content of the Instruction Set Summary section. This
section now refers to the external Instruction Set Manual
instead.
- Removed
device-specific information from peripheral sections
- Restructured
sections related to system dependencies within the peripheral
sections
|
Device |
- Device-specific
information restructured/changed to comply with the devices
documented in this document
- Features
- Pinout
- I/O
Multiplexing and Considerations
- Ordering
Information
- Package
Drawings
- Pinout diagrams updated:
- Memories
- Memory Map figure updated
- Memory
Access (FUSE.LOCKBIT Invalid Key) table
updated
- Documentation about GPIOR added
- Peripherals and
Architecture
- Peripheral Touch Controller (PTC) added in
Peripheral Address Match table
- Interrupt Vector Mapping table updated
- Base Address column renamed to Program
Address (word)
- Peripheral Source column cleaned up
- Description column added
- Package
Drawings
- Updated
the Drawing Numbers table
- Removed
MSL numbers
- Thermal Considerations section moved inside
Package Drawings section
|
AVR CPU |
- Missing information about Flash Offset Address (0x8000) added
(1)
- Removed duplicate
information after the AVR CPU architecture
- Emphasized that the Arithmetic Logic Unit (ALU) is doing its
operations against working registers in the register file
- Added Stack Pointer Instructions table
- Restructured and improved documentation in:
- The
Register File section
- The
X-, Y-, and Z-Registers section
- The
Accessing 16-bit Registers section
- Added On-Chip Debug Capabilities section
- Updated bit names in the Status Register (SREG):
- From
Bit Copy Storage to Transfer
Bit
- From
Sign Bit to Sign Flag
|
NVMCTRL |
- NVMCTRL Block Diagram figure updated
- Missing
Flash Sections figure(1) added
- Write Access After Reset section added
|
CLKCTRL |
- Additional documentation on CLK_TCD added
|
SLPCTRL |
- Sleep Mode Activity Overview table updated
- Debug Operationssection added
|
RSTCTRL |
- Figures added:
- MCU Start-up, RESET Tied to
VDD
- MCU Start-up, RESET Extended
Externally
- Brow-out Detection Reset
- Exernal Reset Characteristics
|
CPUINT |
- Minimum Interrupt Response Time table added
- General
improvement of the documentation and its structure
|
EVSYS |
- Register names updated
- From
ASYNCCH to ASYNCCHn
- From
SYNCCH to SYNCCHn
- From
ASYNCUSER to ASYNCUSERn
- From
SYNCUSER to SYNCUSERn
|
PORT |
- Block diagram updated
- Asynchronous Sensing Pin Properties section added
- Debug Operations section added
- Event Generators in PORTx table added
- General improvement of the documentation and its structure
|
BOD |
- Block diagram updated
- Offset in the Available Interrupt Vectors and Sources
table removed
- Name column added to bit field description tables:
- CTRLA.ACTIVE
- CTRLA.SLEEP
- INTCTRL.VLMCFG
|
WDT |
- Values in the Period bit field updated
|
TCA |
- Block diagram updated
- Timer/Counter Clock Logic figure updated
- Signal Description table updated
- Timer/Counter
Block Diagram Split Mode figure updated
- Event Generators in TCA table added
- Event Users in TCA table added
- Offset in the Available Interrupt Vectors and Sources in
Normal Mode and Available Interrupt Vectors and
Sources in Split mode tables removed
- Tables for the
CTRLB.WGMODE bit field combined into one table
- General improvement of the documentation and its structure
|
TCB |
- Block digram updated
- Timer/Counter Clock Logic figure added
- Figures updated:
- Periodic Interrupt Mode
- Time-Out Check Mode
- Input Capture on Event
- Input Capture Frequency Measurement
- Input Capture Pulse-Width Measurement
- Input Capture Frequency and Pulse-Width Measurement
Mode
- Single-Shot Mode
- 8-Bit PWM Mode
- Event Generators in TCB table added
- Event Users and Available Event Actions in TCB table
added
- Offset in the Available Interrupt Vectors and Sources
table removed
- Name column added to bit field description tables:
- CTRLA.CLKSEL
- CTRLB.CNTMODE
|
TCD |
- Block diagram updated
- Event Generators in TCD table added
- Offset in the Available Interrupt Vectors and Sources
table removed
- Name column added to bit field description tables:
- CTRLA.CLKSEL
- CTRLA.CNTPRES
- CTRLA.SYNCPRES
- CTRLA.ENABLE
- DLYCTRL.DLYPRESC
- DLYCTRL.DLYTRIG
- DLYCTRL.DLYSEL
- General improvement of the documentation and its structure
|
RTC |
- Event Generators in TCD table added
- Offset in the Available Interrupt Vectors and Sources
table removed
- General improvement of the documentation and its structure
|
USART |
- Event Generators in USART table added
- Event Users in USART table added
- Offset in the Available Interrupt Vectors and Sources
table removed
- CTRLD register added
- General improvement of the documentation and its structure
|
SPI |
- Block diagram updated
- Event Generators in TCD table added
- Offset in the Available Interrupt Vectors and Sources
table removed
- Interrupt Flags register separate for Normal and Buffer
mode
- General improvement of the documentation and its structure
|
TWI |
- Offset in the Available Interrupt Vectors and Sources
table removed
- Name column added
to bit field description tables:
- CTRLA.FMPEN
- MCTRLB.ACKACT
- MCTRLB.MCMD
- General improvement of the documentation and its structure
|
CRCSCAN |
- Offset in the Available Interrupt Vectors and Sources
table removed
|
CCL |
- The INSELn bit bields updated
|
AC |
- DACREF removed as
internal input
|
ADC |
- Block diagram updated
- Typo of WCOMP to WCMP fixed
- Removed
offset in the Available Interrupt Vectors and Sources
table
- Updated the
CTRLA.MUXPOS bit field description
|
DAC |
|
PTC |
- Added note about Rs values for mutual capacitance
- Updated links to new external documentation
|
UPDI |
- Updated
figures:
- UPDI
Clock Domains
- UPDI
Instruction Set Overview
- LDS
Instruction Operation
- STS
Instruction Operation
- LD
Instruction Operation
- ST
Instruction Operation
- LCDS
Instruction Operation
- STCS
Instruction Operation
- REPEAT
Instruction Operation
- Inter
Delay Example with LD and RPT
- Added sections:
- BREAK in One-Wire mode
- SYNCH and SYNCH in One-Wire mode
- Extended and
improved the documentation related to enabling the UPDI
peripheral
- Extended and
improved the documentation related to disabling the UPDI
peripheral
- Renamed the UPDI Enable with 12V Override of RESET pin
section to UPDI Enable with High-Voltage Override of RESET
pin
- Added the REPEAT Used With LD Instruction Operation
figure
- Extended and improved the Chip Erase section
- Added Event Generators in UPDI table
- Added documentation for Bus error to the UPDI Error Signature
bit field
- Reset value for the ASI Control A register is updated
- Removed
implementation-specific details that are considered not useful
for the end users
|
Electrical Characterization |
- Added maximum
numbers to the Power Consumption section
- Rounded numbers
in the Peripherals Power Consumtion table
- Added TCD section
- Updated TWI - Timing Requirements figure
- Updated numbers
for tOF in the TWI - Timing Characteristics
table
- Added SDA Hold Time table
- Added a note
about 50% duty cycle requirement for ADC
- Added TEMPSENSE section
- Updated Accuracy Characteristics table for DAC
- Updated tables in
the AC section
- Updated Peripheral Touch Controller Characteristics -
Operating Ratings table
- Added UPDI Max. Bit Rates vs. VDD table
|
Typical Characterization |
- Added
Temperature Sensor Error vs. Temperature ±3σ
figure
- Added TWI SDA Hold Time vs Temperature figure
|