14.5.3 Asynchronous Channel n Generator Selection
| Name: | ASYNCCHn |
| Offset: | 0x02 + n*0x01 [n=0..3] |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ASYNCCH[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 7:0 – ASYNCCH[7:0] Asynchronous Channel Generator Selection
| Value | ASYNCCH0 | ASYNCCH1 | ASYNCCH2 | ASYNCCH3 |
|---|---|---|---|---|
0x00 |
OFF | OFF | OFF | OFF |
0x01 |
CCL_LUT0 | |||
0x02 |
CCL_LUT1 | |||
0x03 |
AC0_OUT | |||
0x04 |
TCD0_CMPBCLR | |||
0x05 |
TCD0_CMPASET | |||
0x06 |
TCD0_CMPBSET | |||
0x07 |
TCD0_PROGEV | |||
0x08 |
RTC_OVF | |||
0x09 |
RTC_CMP | |||
0x0A |
PORTA_PIN0 | PORTB_PIN0 | PORTC_PIN0 | PIT_DIV8192 |
0x0B |
PORTA_PIN1 | PORTB_PIN1 | PORTC_PIN1 | PIT_DIV4096 |
0x0C |
PORTA_PIN2 | PORTB_PIN2 | PORTC_PIN2 | PIT_DIV2048 |
0x0D |
PORTA_PIN3 | PORTB_PIN3 | PORTC_PIN3 | PIT_DIV1024 |
0x0E |
PORTA_PIN4 | PORTB_PIN4 | PORTC_PIN4 | PIT_DIV512 |
0x0F |
PORTA_PIN5 | PORTB_PIN5 | PORTC_PIN5 | PIT_DIV256 |
0x10 |
PORTA_PIN6 | PORTB_PIN6 | AC1_OUT | PIT_DIV128 |
0x11 |
PORTA_PIN7 | PORTB_PIN7 | AC2_OUT | PIT_DIV64 |
0x12 |
UPDI | AC1_OUT | AC1_OUT | |
0x13 |
AC1_OUT | AC2_OUT | - | AC2_OUT |
0x14 |
AC2_OUT | - | - | - |
Other |
- | - | - | - |
Note: Not all pins of a port are
available on devices with low pin counts. Check the Pinout Diagram and/or the
I/O Multiplexing table for details.