30.5.3 Clocks

The EVSYS bus clock (PB2_CLK) can be enabled and disabled in the CRU. Each EVSYS channel, which can be configured as synchronous or resynchronized, has a dedicated generic clock (GCLK_EVSYS_CH_n). These are used for event detection and propagation for each channel. These clocks must be configured and enabled in the generic clock generator before using the EVSYS. See Peripheral Clock Generation (GCLK) from Related Links for more details on clock generation.