8.2 Physical Memory Map
The high-speed bus is implemented as a bus matrix. All high-speed bus addresses are fixed, and they are never remapped in any way, even during boot.
| Memory | Start Address | Size |
|---|---|---|
| PIC32CX510x/WBZ35x | ||
| Boot ROM | 0x00000000 | 64 KB |
| Boot Flash | 0x00800000 | 32 KB |
| Embedded Program Flash | 0x01000000 | 512 KB |
| Embedded SRAM | 0x20000000 | 96 KB |
| Peripheral Bridge A | 0x40000000 | — |
| Peripheral Bridge B | 0x41000000 | |
| Peripheral Bridge C | 0x42000000 | |
| Peripheral Bridge D | 0x44000000 | |
| eFuse | — | 3072 bits |