32.8.11 Receive Error Count

Name: RXERRCNT
Offset: 0x20
Reset: 0x00
Property: Read-Synchronized

Bit 76543210 
 RXERRCNT[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 7:0 – RXERRCNT[7:0] Receive Error Count

This register records the total number of parity errors and NACK errors combined in ISO7816 mode (CTRLA.FORM = 0x7).

This register is automatically cleared on read.