36.13.20 ADCANCON – ADC Analog Warm-up Control Register
This register contains the warm-up control settings for the analog and bias circuit of the ADC module.
Name: | ADCANCON |
Offset: | 0x1800 |
Reset: | 0x00000000 |
Property: | - |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
WKUPCLKCNT[3:0] | |||||||||
Access | R/W | R/W | R/W | R/W | |||||
Reset | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
WKIEN7 | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
WKRDY7 | |||||||||
Access | R/HS/HC | ||||||||
Reset | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
ANEN7 | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bits 27:24 – WKUPCLKCNT[3:0] Wake-up Clock Count bits
These bits represent the number of ADC clocks required to warm-up the ADC module before it can perform conversion. Although the clocks are specific to each ADC, the WKUPCLKCNT bit is common to all ADC modules.
Value | Description |
---|---|
1111 | 215= 32,768 clocks |
... | — |
... | — |
... | — |
0110 | 26= 64 clocks |
0101 | 25= 32 clocks |
0100 | 24= 16 clocks |
0011 | 24= 16 clocks |
0010 | 24= 16 clocks |
0001 | 24= 16 clocks |
0000 | 24= 16 clocks |
Bit 23 – WKIEN7 Shared ADC Wake-up Interrupt Enable bit
Value | Description |
---|---|
1 | Enable interrupt and generate interrupt when the WKRDY7 status bit is set |
0 | Disable interrupt |
Bit 15 – WKRDY7 Shared ADC Wake-up Status bit
Value | Description |
---|---|
1 | ADC Analog and bias circuitry ready after the wake-up count number 2WKUPEXP clocks
after setting ANEN2 to ‘ |
0 | ADC Analog and bias circuitry is not ready |
Bit 7 – ANEN7 Shared ADC Analog and Bias Circuitry Enable bit
Value | Description |
---|---|
1 | Analog and bias circuitry enabled. When the analog and bias circuit is enabled, the ADC module needs a warm-up time, as defined by the ADCANCON.WKUPCLKCNT[3:0] bits. |
0 | Analog and bias circuitry disabled |