35.6.8.4 Baud
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | BAUD |
| Offset: | 0x0C |
| Reset: | 0x0000 |
| Property: | Enable-Protected, PAC Write-Protection |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| BAUD[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| BAUD[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:0 – BAUD[15:0] Baud Value
These bits control clock generation for establishing the data baud rate, Bits Per Sec (BPS), as described in the Clock Generation – Baud-Rate Generator section.
| Operating Mode | Condition | BAUD Register Value Calculation |
|---|---|---|
| Asynchronous Arithmetic | fBAUD ≤ fREF / S | BAUD = 65536 * [1 – (S * (fBAUD / fREF))] |
| Asynchronous Fractional | fBAUD ≤ fREF / S | BAUD = (fREF / (S * fBAUD)) – (FP / 8) |
| Synchronous | fBAUD ≤ fREF / 2 | BAUD = ( fREF / (2 * fBAUD)) – 1 |
| CTRLA.CMODE | CTRLA.MODE | CTRLA.SAMPR | S | BAUD Reg Significant bits | fREF | Comment |
|---|---|---|---|---|---|---|
| 0 | 1 | 0x0 | 16 | BAUD[15:0] | fGLCK_SERCOMn_CORE | Asynchronous
Arithmetic Mode |
| 0x2 | 8 | |||||
| 0x4 | 3 | |||||
| 0x1 | 16 | BAUD[12:0] FP = BAUD[15:13] | Asynchronous Fractional Mode | |||
| 0x3 | 8 | |||||
| 1 | 1 | — | — | BAUD[7:0] | fGLCK_SERCOMn_CORE | Synchronous Host Mode w/internal clock |
| 1 | 0 | — | — | — | fXCK, “SERCOM PAD[1]” | Synchronous Client Mode w/external clock |
Note:
- FP = “Fractional Part” of the BAUD register, BAUD[15:13] value in asynchronous Fractional mode in 1/8 LSB bit values.
- fBAUD = The user desired bits per second data rate.