42.7.29 ADC FIFO Output Data Register (ADC)
Note: Reading any part of the PFFDATA register advances the FIFO pointer, therefore it
is recommended to read all 32 bits of the register and then parse out the values of
each field.
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | PFFDATA |
| Offset: | 0xD8 |
| Reset: | 0x00000000 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| PFFCNT[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| PFFFRACT | PFFSIGN | PFFCORID[1:0] | PFFCHNID[3:0] | ||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PFFDATA[15:8] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PFFDATA[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 31:24 – PFFCNT[7:0] Current number of data entries to be read in the APB FIFO
Bit 23 – PFFFRACT CHNCFG2n.FRACTk setting associated with data in the PFFDATA register
Bit 22 – PFFSIGN CHNCFG3n.SIGNk setting associated with data in the PFFDATA register
Bits 21:20 – PFFCORID[1:0] Module Index n associated with PFFCHNID[3:0] and data in the PFFDATA register
| Value | Description |
|---|---|
| 00 | data from ADC0 |
| 01 | data from ADC1 |
| 10 | data from ADC2 |
| 11 | data from ADC3 |
Bits 19:16 – PFFCHNID[3:0] Analog Input Channel Index k associated with PFFCORID and data in the PFFDATA register, 0 ≤ k ≤ Sn-1
Bits 15:0 – PFFDATA[15:0] 16-bit Output Data of the FIFO
Data is in the format given by PFFFRACT and PFFSIGN.