32.5.22 ADACT
| Name: | ADACT |
| Offset: | 0x1D2C |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ACT[5:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 5:0 – ACT[5:0] Auto-Conversion Trigger Select
| ACT | Auto-Conversion Trigger Source |
|---|---|
111111-101010 |
Reserved |
101001 |
CLB_BLE[7] |
101000 |
CLB_BLE[6] |
100111 |
CLB_BLE[5] |
100110 |
CLB_BLE[4] |
100101 |
CLB_BLE[3] |
100100 |
CLB_BLE[2] |
100011 |
CLB_BLE[1] |
100010 |
CLB_BLE[0] |
100001 |
PWM2_OUT |
100000 |
PWM1_OUT |
011111 |
Software write to ADPCH |
011110 |
Software read/write of ADRESH |
011101 |
Software read/write of ADERRH |
011100-011010 |
Reserved |
011001 |
CLC4_OUT |
011000 |
CLC3_OUT |
010111 |
CLC2_OUT |
010110 |
CLC1_OUT |
010101 |
Interrupt-on-change Interrupt Flag |
010100 |
C2_OUT |
010011 |
C1_OUT |
010010-001010 |
Reserved |
001001 |
CCP2_OUT |
001000 |
CCP1_OUT |
000111-000101 |
Reserved |
000100 |
TMR2_postscaled_OUT |
000011 |
TMR1_overflow |
000010 |
TMR0_overflow |
000001 |
Pin selected by ADACTPPS |
000000 |
External Trigger Disabled |