2 Pin Diagrams

Figure 2-1.

14-Pin SOIC

14-Pin TSSOP

Figure 2-2.

20-Pin PDIP

20-Pin SOIC

20-Pin SSOP

Figure 2-3.

20-Pin VQFN

Note: It is recommended that the exposed bottom pad be connected to V_SS; however, it must not be the only V_SS connection to the device.