7.17 Appendix B - Available Cores in Libero SoC Catalog
(Ask a Question)The following is a consolidated table of all the available initiators, bus, and bridge cores supported by the memory map feature. The last column specifies, if needed, the minimum version of the core required for the memory map feature to work as expected.
Classification | Core | Core Type | Core Versions for Correct Memory Map Generation |
---|---|---|---|
Initiators | MIV_RV32IMC | AXI, AHBLite and APB3 Initiators | All available production versions supported |
MIV_RV32 |
AXI, AHBLite and APB3 Initiators | All available production versions supported | |
MIV_RV32IMA_L1_AXI | AXI Initiator | All available production versions supported | |
MIV_RV32IMA_L1_AHB | AHBLite Initiator | All available production versions supported | |
MIV_RV32IMAF_L1_AHB | AHBLite Initiator | All available production versions supported | |
CORERISCV_AXI4 | AXI4 Initiator | All available production versions supported | |
COREAXI4DMACONTROLLER | AXI4 Initiator | All available production versions supported | |
COREABC | APB3 Initiator | All available production versions supported | |
Family-specific Initiator cores | PolarFire® SoC Standalone MSS (PolarFire SoC only) | AXI4 Initiator | All available production versions supported |
System Builder and SmartFusion® 2 MSS (SmartFusion2 and IGLOO® 2) | AHBLite and APB3 Initiators | All available production versions supported | |
CORECORTEXM1(PolarFire, PolarFire SoC and RTG4™) | AHBLite Initiator | All available production versions supported | |
PF_PCIE (PolarFire only) | AXI Initiator | All available production versions supported | |
SERDES_IF, SERDES_IF2, SERDES_IF3 (SmartFusion 2 and IGLOO 2) | AXI and AHBLite Initiators | All available production versions supported | |
PCIE_SERDES_IF (RTG4 only) | AXI and AHBLite Initiators | All available production versions supported | |
COREHPDMACTRL (SmartFusion 2 and IGLOO 2) | AHBLite Initiator | All available production versions supported | |
CORESYSSERVICES (SmartFusion 2 and IGLOO 2) | AHBLite Initiator | All available production versions supported | |
CoreConfigMaster (SmartFusion 2 and IGLOO 2) | AHBLite Initiator | All available production versions supported | |
Bus cores | COREAXI4INTERCONNECT | AXI bus | Version v2.5.100 and above supported |
CoreAHBLite | AHBLite bus | All available production versions supported | |
CoreAPB3 | APB3 bus | All available production versions supported | |
CoreAXI | AXI bus | All available production versions supported | |
Family-specific bus type cores | PF_DRI (PolarFire and PolarFire SoC) | APB bus | Support for generating Memory Maps is planned for a future release. |
CoreConfigP (SmartFusion 2 and IGLOO 2) | APB bus | All available production versions supported | |
Bridge cores | COREAXITOAHBL | AXI to AHBLite bridge | Version v3.5.100 and above |
COREAHBL2AHBL_BRIDGE | AHBLite to AHBLite bridge | Support for generating Memory Maps is planned for a future release. | |
COREAHBLTOAXI | AHBLite to AXI bridge | All available production versions supported | |
COREAHBTOAPB3 | AHBLite to APB bridge | All available production versions supported | |
COREAXITOAXICONNECT | AXI to AXI bridge | Support for generating Memory Maps is planned for a future release. |