The flowcharts shown in this section provide examples for read and
write operations. A polling or interrupt method can be used to check the status bits. The
interrupt method requires that the Interrupt Enable register (FLEX_TWI_IER) be configured
first.
Figure 8-108. TWI Write Operation with Single Data Byte without Internal
AddressFigure 8-109. TWI Write Operation with Single Data Byte and Internal
AddressFigure 8-110. TWI Write Operation with Multiple Data Bytes with or without
Internal AddressFigure 8-111. SMBus Write Operation with Multiple Data Bytes with or
without Internal Address and PEC SendingFigure 8-112. SMBus Write Operation with Multiple Data Bytes with PEC and
Alternative Command ModeFigure 8-113. TWI Write Operation with Multiple Data Bytes and Read
Operation with Multiple Data Bytes (Sr)Figure 8-114. TWI Write Operation with Multiple Data Bytes + Read Operation
and Alternative Command Mode + PECFigure 8-115. TWI Read Operation with Single Data Byte without Internal
AddressFigure 8-116. TWI Read Operation with Single Data Byte and Internal
AddressFigure 8-117. TWI Read Operation with Multiple Data Bytes with or without
Internal AddressFigure 8-118. TWI Read Operation with Multiple Data Bytes with or without
Internal Address with PECFigure 8-119. TWI Read Operation with Multiple Data Bytes with Alternative
Command Mode with PECFigure 8-120. TWI Read Operation with Multiple Data Bytes + Write Operation
with Multiple Data Bytes (Sr)Figure 8-121. TWI Read Operation with Multiple Data Bytes + Write with
Alternative Command Mode with PEC