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Ultra-Low Power Arm® ARM926EJ-S™ Processor-Based MPU, 600 MHz, Camera, LCD, 2D Graphics, Dual 10/100 Ethernet, CAN, USB, QSPI, FLEXCOMs, AES, SHA
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Product Pages
SAM9X60
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8
Connectivity Subsystem
8.4
Quad Serial Peripheral Interface (QSPI)
8.4.6
Functional Description
8.4.6.4
QSPI SPI Mode
8.4.6.4.2
SPI Mode Block Diagram
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Image Subsystem
6
Audio Subsystem
7
Security and Cryptography Subsystem
8
Connectivity Subsystem
8.1
Overview
8.2
Ethernet MAC 10/100 (EMAC)
8.3
Flexible Serial Communication Controller (FLEXCOM)
8.4
Quad Serial Peripheral Interface (QSPI)
8.4.1
Description
8.4.2
Embedded Characteristics
8.4.3
Block Diagram
8.4.4
Signal Description
8.4.5
Product Dependencies
8.4.6
Functional Description
8.4.6.1
Serial Clock Baud Rate
8.4.6.2
Serial Clock Phase and Polarity
8.4.6.3
Transfer Delays
8.4.6.4
QSPI SPI Mode
8.4.6.4.1
SPI Mode Operations
8.4.6.4.2
SPI Mode Block Diagram
8.4.6.4.3
SPI Mode Flow Diagram
8.4.6.4.4
Peripheral Deselection without DMA
8.4.6.4.5
Peripheral Deselection with DMA
8.4.6.5
QSPI Serial Memory Mode
8.4.6.6
Scrambling/Unscrambling Function
8.4.6.7
Register Write Protection
8.4.7
Register Summary
8.5
Secure Digital MultiMedia Card Controller (SDMMC)
8.6
Controller Area Network (CAN)
8.7
Timer Counter (TC)
8.8
Pulse Width Modulation Controller (PWM)
9
USB Subsystem
10
Electrical and Mechanical Characteristics
11
Revision History
Microchip Information
8.4.6.4.2 SPI Mode Block Diagram
Figure 8-149.
SPI Mode Block Diagram
