5.1 Multiplexed Signals
VQFN 20-Pin | SOIC 20-Pin | Pin Name (1,2) | Other/Special | ADC0 | ADC1 | PTC(4) | AC0 | AC1 | AC2 | DAC0 | USART0 | SPI0 | TWI0 | TCA0 | TCBn | TCD0 | CCL |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
19 | 16 | PA0 | RESET/ UPDI | AIN0 | LUT0-IN0 | ||||||||||||
20 | 17 | PA1 | AIN1 | TxD(3) | MOSI | SDA(3) | LUT0-IN1 | ||||||||||
1 | 18 | PA2 | EVOUT0 | AIN2 | RxD(3) | MISO | SCL(3) | LUT0-IN2 | |||||||||
2 | 19 | PA3 | EXTCLK | AIN3 | XCK(3) | SCK | WO3 | TCB1 WO | |||||||||
3 | 20 | GND | |||||||||||||||
4 | 1 | VDD | |||||||||||||||
5 | 2 | PA4 | AIN4 | AIN0 | X0/Y0 | XDIR(3) | SS | WO4 | WOA | LUT0-OUT | |||||||
6 | 3 | PA5 | VREFA | AIN5 | AIN1 | X1/Y1 | OUT | AINN0 | WO5 | TCB0 WO | WOB | ||||||
7 | 4 | PA6 | AIN6 | AIN2 | X2/Y2 | AINN0 | AINP1 | AINP0 | OUT | ||||||||
8 | 5 | PA7 | AIN7 | AIN3 | X3/Y3 | AINP0 | AINP0 | AINN0 | LUT1-OUT | ||||||||
9 | 6 | PB5 | CLKOUT | AIN8 |
X12/Y12 | AINP1 | AINP2 | WO2(3) | |||||||||
10 | 7 | PB4 | AIN9 | X13/Y13 | AINN1 | AINP3 | WO1(3) | LUT0-OUT(3) | |||||||||
11 | 8 | PB3 |
TOSC1 | OUT | RxD | WO0(3) | |||||||||||
12 | 9 | PB2 | TOSC2, EVOUT1 | OUT | TxD | WO2 | |||||||||||
13 | 10 | PB1 | AIN10 | X4/Y4 | AINP2 | XCK | SDA | WO1 | |||||||||
14 | 11 | PB0 | AIN11 | X5/Y5 | AINP2 | AINP1 | XDIR | SCL | WO0 | ||||||||
15 | 12 | PC0 | AIN6 | X6/Y6 | SCK(3) | TCB0 WO(3) | WOC | ||||||||||
16 | 13 | PC1 | AIN7 | X7/Y7 | MISO(3) | WOD | LUT1-OUT(3) | ||||||||||
17 | 14 | PC2 | EVOUT2 | AIN8 | X8/Y8 | MOSI(3) | |||||||||||
18 | 15 | PC3 | AIN9 | X9/Y9 | SS(3) | WO3(3) | LUT1-IN0 |
Note:
- Pin names are of type Pxn, with x being the PORT instance (A, B) and n the pin number. Notation for signals is PORTx_PINn. All pins can be used as event input.
- All pins can be used for external interrupt, where pins Px2 and Px6 of each port have full asynchronous detection.
- Alternate pin positions. For selecting the alternate positions, refer to the PORTMUX documentation.
- Every PTC line can be configured as X- or Y-line.