25.3.3 Interrupts

Table 25-6. Available Interrupt Vectors and Sources
Offset Name Vector Description Conditions
0x00 SPI SPI interrupt
  • SSI: Slave Select Trigger Interrupt
  • DRE: Data Register Empty Interrupt
  • TXC: Transfer Complete Interrupt
  • RXC: Receive Complete Interrupt

When an interrupt condition occurs, the corresponding interrupt flag is set in the Interrupt Flags register of the peripheral (peripheral.INTFLAGS).

An interrupt source is enabled or disabled by writing to the corresponding enable bit in the peripheral's Interrupt Control register (peripheral.INTCTRL).

An interrupt request is generated when the corresponding interrupt source is enabled and the interrupt flag is set. The interrupt request remains active until the interrupt flag is cleared. See the peripheral's INTFLAGS register for details on how to clear interrupt flags.