2.1 Architecture

The PIC32CX-BZ6 family is based on an ARM® Cortex® M4F core with different CPU clock settings. The Flash Controller (FC) abstracts the Flash topology to program the internal embedded Flash, while the Device Service Unit (DSU) serves as the programming interface, using ARM’s two-wire SWD interface. The following table lists CPU clock of different devices.

Table 2-1. CPU Clock Setting
DevicesMax. Clock Speed
PIC32CX-BZ3 64 MHz
PIC32CX-BZ6128 MHz
Note: The information on the PIC32CX-BZ3 is provided for comparison and reference purposes.
The Device Service Unit (DSU) module on device provides a means to detect debugger probes. This enables the ARM Debug Access Port (DAP) to have control over multiplexed debug pads and CPU Reset. Serial Wire Debug (SWD) is a two-wire protocol for accessing the ARM debug interface (Refer ARM® Debug Interface Specification v5). The Flash Controller (FC) which abstracts the Flash topology for programming the embedded single panel Flash.
Figure 2-1. DSU Block Diagram