3.2.6.2 PIOB Bank

The PIOB bank is mainly used for the SPI interface, QSPI and SD Card over power rails VDDIOP0, VDDQSPI1/0 and VDDSDMMC1, respectively.

The following schematic shows the PIOB bank distribution.

Figure 3-16. SAMA7G5 PIOB Bank Distribution

The following table describes each PIOB bank function.

Table 3-6. SAMA7G5 PIOs Pin Assignment and Signal Description
PIO	Power Rail	Function	Signal Description
PB0	VDDIOP0	SPDIF_RX	SPDIF receive data
PB1	VDDIOP0	SPDIF_TX	SPDIF transmit data
PB2	VDDIOP0	PB2	Power enable USB host port A
PB3	VDDIOP0	FLEXCOM11_IO0	mikroBUS 1 or mikroBUS 2 SPI MOSI line
PB4	VDDIOP0	FLEXCOM11_IO1	mikroBUS 1 or mikroBUS 2 SPI MISO line
PB5	VDDIOP0	FLEXCOM11_IO2	mikroBUS 1 or mikroBUS 2 SPI CLOCK line
PB6	VDDIOP0	FLEXCOM11_IO3	mikroBUS 1 SPI Chip Select line
PB7	VDDIOP0	FLEXCOM11_IO4	mikroBUS 2 SPI Chip Select line
PB8	VDDIOP0	PB8	Red LED control or RPi connector GPIO
PB9	VDDQSPI0	QSPI0_IO3	Octal SPI0 I/O line 3
PB10	VDDQSPI0	QSPI0_IO2	Octal SPI0 I/O line 2
PB11	VDDQSPI0	QSPI0_IO1	Octal SPI0 I/O line 1
PB12	VDDQSPI0	QSPI0_IO0	Octal SPI0 I/O line 0
PB13	VDDQSPI0	QSPI0_CS	Octal SPI0 Chip Select
PB14	VDDQSPI0	QSPI0_SCK	Octal SPI0 serial clock
PB15	VDDQSPI0	PB15	MCP16502 HPM control
PB16	VDDQSPI0	QSPI0_IO4	Octal SPI0 I/O line 4
PB17	VDDQSPI0	QSPI0_IO5	Octal SPI0 I/O line 5
PB18	VDDQSPI0	QSPI0_IO6	Octal SPI0 I/O line 6
PB19	VDDQSPI0	QSPI0_IO7	Octal SPI0 I/O line 7
PB20	VDDQSPI0	QSPI0_DQS	Octal SPI0 data strobe
PB21	VDDQSPI0	QSPI0_INT	Octal SPI0 interrupt
PB22	VDDQSPI1	QSPI1_IO3	RPi connector QSPI1 I/O line 3
PB23	VDDQSPI1	QSPI1_IO2	RPi connector QSPI1 I/O line 2
PB24	VDDQSPI1	QSPI1_IO1	RPi connector QSPI1 I/O line 1
PB25	VDDQSPI1	QSPI1_IO0	RPi connector QSPI1 I/O line 0
PB26	VDDQSPI1	QSPI1_CS	RPi connector QSPI1 Chip Select
PB27	VDDQSPI1	QSPI1_SCK	RPi connector QSPI1 serial clock
PB28	VDDSDMMC1	SDMMC1_RSTN	SD Card reset signal
PB29	VDDSDMMC1	SDMMC1_CMD	SD Card command line
PB30	VDDSDMMC1	SDMMC1_CK	SD Card clock signal
PB31	VDDSDMMC1	SDMMC1_DAT0	SD Card data line 0