5.9 Interrupts

The MPLAB XC8 compiler incorporates features that allow interrupts to be fully handled from C code. Interrupt functions, which contain the code to be executed when an interrupt is triggered, are often called Interrupt Service Routines, or ISRs.

Interrupts are processed differently by the different device families, and some devices can be configured to have interrupts operate in one of several ways. Additionally, the compiler can provide source-level functionality to make programming and executing interrupts easier and more efficient.

The possible interrupt vector arrangements for 8-bit PIC® devices are:

A single vector location linked to all interrupt sources
Two independent vectors, one assigned to low-priority interrupt sources, the other to high-priority sources
A software interrupt vector table (Software IVT) implemented by the compiler
Multiple hardware interrupt vector tables (Hardware IVTs) managed by a vectored interrupt controller (VIC) module

The table below shows which arrangements are available with each device family.

Table 5-12. Interrupt Processing Availability across Devices
Device Family	Family Arch	Single Vector	Dual Priority Vectors	Software IVT	Hardware IVTs
Baseline devices without interrupts	PIC12, PIC12E
Baseline devices with Interrupts	PIC12IE	X		X
Mid-range devices	PIC14, PIC14E, PIC14EX	X		X
PIC18 devices without VIC	PIC18	X (Mid-range Compatibility mode)	X	X
PIC18 devices with VIC	PIC18XV	X (Mid-range Compatibility mode)	X (Legacy mode)		X

The operation of the Hardware IVT on PIC18 devices with a VIC module can be disabled by clearing the MVECEN configuration bit. The device is then said to be operating in Legacy mode, employing dual priorities and dual vector locations like regular PIC18 devices without the VIC module. This configuration bit is also used by the compiler to determine how interrupt functions should be programmed, so ensure it is set to OFF for legacy operation. Although the full vector table is disabled in this mode, the dual vector locations are still relocatable. By default, the vector locations will be 0x8 and 0x18, the same as for regular PIC18 devices without the VIC module.

The dual-priority scheme implemented by PIC18 devices can also be disabled by clearing the IPEN SFR bit. Such devices are then said to be operating in Mid-range Compatibility mode and utilize only one interrupt vector, located at address 0x8.

In addition to the interrupt configurations in hardware, the compiler can provide an interrupt vector table in software for any device that supports interrupts but do not implement a hardware VIC module. This allows such devices to be programmed as if they had one vector for each interrupt source and so benefit from reduced interrupt latency.

Interrupt code is the name given to any code that executes as a result of an interrupt occurring, including functions called from the ISR and library code. The interrupt code completes at the point where the corresponding return from interrupt instruction is executed. This contrasts with main-line code, which, for a freestanding application, is usually the main part of the program that executes after Reset.