1.9.1 PFM Back-to-Back Writes

When repetitive writes to non-volatile memory (Program Flash Memory) are performed, it could result in write/erase failures at some locations. The issue is due to latent timing in the non-volatile memory controller which can cause the write instruction to fail under certain conditions.

Work around

To avoid the issue, the customer needs to wait an additional 100 μs after the WR bit of the NVMCON1 register has been set, allowing for the last word to be loaded into the latch. This delay is added only when the LWLO bit of the NVMCON1 register is cleared in the software.

if(i == (WRITE_FLASH_BLOCKSIZE-1))
        {
            // Start Flash program memory write
            NVMCON1bits.LWLO = 0;
        }
         NVMCON2 = 0x55;
        NVMCON2 = 0xAA;
        NVMCON1bits.WR = 1;
         if (NVMCON1bits.LWLO==0)
        {
        __delay_us(100);
        }
        NOP();
        NOP();
 
    writeAddr++;
    }

Affected Silicon Revisions