| F | 10/2024 | Updated reset values for IPR0, IPR3, TMR0H and BAUDxCON. Added data sheet
clarifications. Editorial corrections. |
| E | 03/2018 | Fixed errors in the 44-pin TQFP and QFN pin diagrams. Split TMR0 register
(18.6.3) into separate 8-bit registers called TMR0H (18.6.3) and TMR0L (18.6.4).
Updated Equation 31-1. Corrected typos. |
| D | 10/2017 | Updated Cover page. Data sheet format and content updated. Added characteristic
graphs. |
| C | 04/2017 | Updated Cover page. Updated Example 13-1; Figures 6-1 and 11-11; Registers 3-6,
19-1, and 26-9; Sections 1.1.2, 4.3, 13.8, 23.5, 26.5.1, 26.10, 31.1.2, and 31.1.6;
Tables 4-1, 10-5, 37-11 and 37-15. New Timer 2 chapter. Removed Section 4.4.2 and
31.2.3. Added Section 23.5.1. |
| B | 09/2016 | Updated Peripheral Module, Memory and Core features descriptions on cover page.
Updated the PIC18(L)F2X/4XK40 Family Types Table. Updated Examples 11-1, 11-3, 11-5
and 11-6; Figures 14-1 and 32-2; Registers 4-2, 4-5 and 13-18; Sections 1.2, 4.4.1,
4.5, 4.5.4, 17.3, 17.5, 18.1, 18.1.1, 18.1.1.1, 18.1.2, 18.1.6, 18.3, 18.4, 18.7,
19.0, 19.8.1, 20.0, 21.3 and 26.3; Tables 4-2, 10-4, 37-2, 37-3, 37-5, 37-13,
37-14. |
| A | 05/2016 | Initial document release. |
