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AVR16EB14/20/28/32 Preliminary Data Sheet
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40
Data Sheet Revision History
40.1
Revision History
Introduction
Family Overview
Features
1
Block Diagram
2
Pinout
3
I/O Multiplexing and Considerations
4
Hardware Guidelines
5
Power Domains
6
Conventions
7
AVR® CPU
8
Memories
9
GPR - General Purpose Registers
10
Peripherals and Architecture
11
NVMCTRL - Nonvolatile Memory Controller
12
CLKCTRL - Clock Controller
13
SLPCTRL - Sleep Controller
14
RSTCTRL - Reset Controller
15
CPUINT - CPU Interrupt Controller
16
EVSYS - Event System
17
PORTMUX - Port Multiplexer
18
PORT - I/O Pin Configuration
19
BOD - Brown-out Detector
20
VREF - Voltage Reference
21
WDT - Watchdog Timer
22
TCB - 16-Bit Timer/Counter Type B
23
TCE - 16-Bit Timer/Counter Type E
24
WEX - Waveform Extension for the 16-Bit Timer/Counter Type E
25
TCF -
24
-bit Timer/Counter Type F
26
RTC - Real-Time Counter
27
USART - Universal Synchronous and Asynchronous Receiver and Transmitter
28
SPI - Serial Peripheral Interface
29
TWI - Two-Wire Interface
30
CRCSCAN - Cyclic Redundancy Check Memory Scan
31
CCL - Configurable Custom Logic
32
AC - Analog Comparator
33
ADC - Analog-to-Digital Converter
34
UPDI - Unified Program and Debug Interface
35
Instruction Set Summary
36
Electrical Characteristics
37
Characteristics Graphs
38
Ordering Information
39
Packaging Information
40
Data Sheet Revision History
40.1
Revision History
Microchip Information
40.1 Revision History
Doc. Rev.
Date
Comments
A
10/2023
Initial document release