13.3.2.1 Sleep Modes

Three different sleep modes can be enabled to reduce power consumption.

Idle
The CPU stops executing code, resulting in reduced power consumption.
All peripherals are running, and all interrupt sources can wake the device.
Standby
All high-frequency clocks are stopped apart from any peripheral or clock that are enabled to run in Standby sleep mode. This is enabled by writing the corresponding RUNSTDBY bit to ‘1’. The power consumption is dependent on the enabled functionality.
A subset of interrupt sources can wake the device(1).
Power-Down
All high-frequency clocks are stopped, resulting in a power consumption lower than the Idle sleep mode.
A subset of the peripherals are running, and a subset of interrupt sources can wake the device(1).
Note:
  1. Refer to the Sleep Mode Activity tables for further information.

Refer to the Wake-up Time section for information on how the wake-up time is affected by the different sleep modes.

Table 13-1. Sleep Mode Activity Overview for Peripherals
Peripheral Clock Active in Sleep Mode
Idle Standby Power-Down
CPU CLK_CPU
RTC CLK_RTC X X(1,2) X(2)
WDT CLK_WDT X X X
BOD CLK_BOD(3) X X X
CCL (4) X X(1)
TCF (4) X X
ADCn CLK_PER X X(1)
TCE
TCBn
All other peripherals X
Note:
  1. RUNSTDBY bit of the corresponding peripheral must be set to enter an active state.
  2. In Standby sleep mode, only the RTC functionality requires the RUNSTDBY to be set to enter an active state. In Power-Down sleep mode, only the PIT functionality is available.
  3. Sampled mode only.
  4. The clock domain depends on the clock source selected for CCL.
Table 13-2. Sleep Mode Activity Overview for Clock Sources
Clock Source Active in Sleep Mode
Idle Standby Power-Down
Main clock source X X(1)
RTC clock source X X(1,2) X(2)
WDT oscillator X X X
BOD oscillator(3) X X X
CCL clock source X X(1)
TCF clock source X X(1)
Note:
  1. RUNSTDBY bit of the corresponding peripheral must be set to enter an active state.
  2. In Standby sleep mode, only the RTC functionality requires the RUNSTDBY to be set to enter an active state. In Power-Down sleep mode, only the PIT functionality is available.
  3. Sampled mode only.
Table 13-3. Sleep Mode Wake-Up Sources
Wake-Up Source Active in Sleep Mode
Idle Standby Power-Down
PORT Pin interrupt X X X(1)
TWI Address Match interrupt X X X
BOD VLM interrupt X X X
CCL interrupts X X(2) X(3)
RTC interrupts X X(2,4) X(4)
USART Start-of-Frame interrupt - X -
ADCn interrupts X X(2) -
ACn interrupts
TCEn interrupts
TCBn interrupt
TCFn interrupt
All other interrupts X - -
Note:
  1. The I/O pin has to be configured according to Asynchronous Sensing Pin Properties in the PORT section.
  2. RUNSTDBY bit of the corresponding peripheral must be set to enter an active state.
  3. CCL can wake up the device if the path through LUTn is asynchronous (FILTSEL=0x0 and EDGEDET=0x0 in the LUT n Control A (CCL.LUTnCTRLA) register).
  4. In Standby sleep mode, only the RTC functionality requires the RUNSTDBY to be set to enter an active state. In Power-Down sleep mode, only the PIT functionality is available.