3.1.1 I/O Multiplexing

A clarification is made in Table 3-1. PORT Function Multiplexing. The “footnote 4” is also valid for LUT0-OUT on pin PB4. Functional change is shown in bold.

Table 3-1. PORT Function Multiplexing


VQFN 24-pin	VQFN 20-pin	SSOP/SOIC 20-pin	TSSOP/SOIC 14-pin	Pin Name ^(1,2)	Other/Special	ADC0⁽³⁾	AC0	USART0	USART1	SPI0	TWI0	TCA0	TCBn	CCL
23	19	16	10	PA0	RESET UPDI									LUT0-IN0
24	20	17	11	PA1		AIN1		TXD⁽⁴⁾	TXD	MOSI				LUT0-IN1
1	1	18	12	PA2	EVOUTA	AIN2		RxD⁽⁴⁾	RXD	MISO				LUT0-IN2
2	2	19	13	PA3	EXTCLK	AIN3		XCK⁽⁴⁾	XCK	SCK		WO3	1,WO
3	3	20	14	GND
4	4	1	1	VDD
5	5	2	2	PA4		AIN4		XDIR⁽⁴⁾	XDIR	SS		WO4		LUT0-OUT
6	6	3	3	PA5	VREFA	AIN5	OUT					WO5	0,WO	LUT3-OUT⁽⁴⁾
7	7	4	4	PA6		AIN6	AINN0
8	8	5	5	PA7	EVOUTA⁽⁴⁾	AIN7	AINP0							LUT1-OUT
9				PB7	EVOUTB⁽⁴⁾
10				PB6			AINP3							LUT2-OUT⁽⁴⁾
11	9	6		PB5	CLKOUT	AIN8	AINP1					WO2⁽⁴⁾
12	10	7		PB4	RESET⁽⁴⁾	AIN9	AINN1					WO1⁽⁴⁾		LUT0-OUT⁽⁴⁾
13	11	8	6	PB3	TOSC1			RxD				WO0⁽⁴⁾		LUT2-OUT
14	12	9	7	PB2	TOSC2 EVOUTB			TxD				WO2		LUT2-IN2
15	13	10	8	PB1		AIN10	AINP2	XCK			SDA	WO1		LUT2-IN1
16	14	11	9	PB0		AIN11	AINN2	XDIR			SCL	WO0		LUT2-IN0
17	15	12		PC0		AIN12			XCK⁽⁴⁾	SCK⁽⁴⁾			0,WO⁽⁴⁾	LUT3-IN0
18	16	13		PC1		AIN13			RxD⁽⁴⁾	MISO⁽⁴⁾				LUT1-OUT⁽⁴⁾ LUT3-IN1
19	17	14		PC2	EVOUTC	AIN14			TxD⁽⁴⁾	MOSI⁽⁴⁾				LUT3-IN2
20	18	15		PC3		AIN15			XDIR⁽⁴⁾	SS⁽⁴⁾		WO3⁽⁴⁾		LUT1-IN0
21				PC4								WO4⁽⁴⁾	1,WO⁽⁴⁾	LUT1-IN1 LUT3-OUT
22				PC5								WO5⁽⁴⁾		LUT1-IN2

Note:

Pin names are Pxn type, with xbeing the PORT instance (A, B) and n the pin number. Notation for signals is PORTx_PINn.
All pins can be used for external interrupt where pins Px2 and Px6 of each port have full asynchronous detection. All pins can be used as event input.
AIN[15:8] can not be used as negative ADC input for differential measurements.
Alternative pin location. For selecting an alternative pin location, refer to the PORTMUX section.