12.3 ADC_IMR interrupts enabled when ones written to ADC_EOC_IDR

Writing 1s to ADC_EOC_IDR enables interrupts in ADC_IMR. If interrupts are pending in ADC_ISR, an interrupt is triggered to the interrupt controller.

Writing to ADC_EOC_IDR is not recommended.

Work Around

Immediately after writing 1s to ADC_EOC_IDR, write 1s to ADC_IDR to disable the unwanted interrupts (store previous value, disable all, reenable previous value).

Affected Silicon Revisions