5.2 Some XDMAC0 and XDMAC1 channels ineffective
Reading any register of channels 0, 1, 18, 19, 26 and 27 of XDMAC0 and XDMAC1 may return corrupted values.
Work Around
Do not use XDMAC0 and XDMAC1 channels 0, 1, 18, 19, 26 and 27.
Affected Silicon Revisions
| A0 | A1 | A1-D1G | A1-D2G | ||||
| X | – | – | – |