43.5 Peripheral Dependencies
| Peripheral
Name | Base Address | NVIC IRQ
Index:Source | Peripheral Clock Enable/Disable | GCLK Peripheral Channel Clock Name : Register | PAC Peripheral ID (PAC.WRCTRL.PERIDx) | DMA Trigger Index:Source (DMAC.CHCTRLBk.TRIGx) | Power Domain |
|---|---|---|---|---|---|---|---|
| CAN0 | 0x4600_2000 |
51: LINE0, LINE1, ERROR |
Peripheral Clock Disable: CFGPCLKGEN4[27] | GCLK_CAN0 : 28 | 104 | 67 : DEBUG | VDDREG |
| CAN1 | 0x4600_2400 | 52: LINE0, LINE1, ERROR |
Peripheral Clock Disable: CFGPCLKGEN4[31] | GCLK_CAN1 : 29 | 105 | 68 : DEBUG | VDDREG |
Note: In order to use this peripheral, other
parts of the system must be configured correctly, as described below.