38.7 Register Description

Registers can be 8, 16 or 32 bits wide. Atomic 8-, 16- and 32-bit accesses are supported. In addition, the 8-bit quarters and 16-bit halves of a 32-bit register and the 8-bit halves of a 16-bit register can be accessed directly.

Optional write protection by the PAC is denoted by the PAC Write Protection property in each individual register description. See Peripheral Access Controller (PAC) from Related Links.

Some registers are enable-protected, meaning they can only be written when the peripheral is disabled. Enable protection is denoted by the Enable-protected property in each individual register description.

The following are the list of conventions available in the register description:

  • R = Readable bit
  • W = Writable bit
  • U = Unimplemented bit, read as ‘0’
  • -n = Value at POR
  • 1 = Bit is set
  • 0 = Bit is cleared
  • x = Bit is unknown

  • HS = Hardware Set

  • HC = Hardware Cleared