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Highly Integrated Wireless MCU with CAN FD, Ethernet, USB, Motor Control, Graphics, Touch and Enhanced Security

PIC32CX2051BZ62132 PIC32WM-BZ6204UE

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35 SERCOM Inter-Integrated Circuit (SERCOM I²C)
35.3 Block Diagram

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Introduction
PIC32CX-BZ6 SoC Family Features
PIC32WM-BZ6 Module Features
1 Acronyms and Abbreviations
2 Ordering Information
3 Configuration Summary
4 PIC32CX-BZ6 SoC Description
5 PIC32WM-BZ6 Module Description
6 Pinout and Signal Descriptions List
7 I/O Ports and Peripheral Pin Select (PPS)
8 Power Subsystem
9 Product Memory Mapping Overview
10 Processor and Architecture
11 Prefetch Cache (PCHE)
12 Cortex M Cache Controller (CMCC)
13 Secure Boot ROM
14 eFuse Controller
15 Security Features
16 Flash Controller (FC)
17 Device Service Unit (DSU)
18 Clock and Reset Unit (CRU)
19 Power Management Unit (PMU)
20 Watchdog Timer (WDT)
21 Deadman Timer (DMT)
22 RAM Error Correction Code (RAMECC)
23 System Configuration and Register Locking (CFG)
24 Peripheral Module Disable (PMD)
25 Peripheral Access Controller (PAC)
26 Real-Time Counter and Calendar (RTCC)
27 Direct Memory Access Controller (DMAC)
28 External Interrupt Controller (EIC)
29 Configurable Custom Logic (CCL)
30 Frequency Meter (FREQM)
31 Event System (EVSYS)
32 Serial Communication Interface (SERCOM)
33 SERCOM Synchronous and Asynchronous Receiver and Transmitter (SERCOM USART)
34 SERCOM Serial Peripheral Interface (SERCOM SPI)
35 SERCOM Inter-Integrated Circuit (SERCOM I²C)
36 Quad Serial Peripheral Interface (QSPI)
37 Analog-to-Digital Converter (ADC)
38 Automated Touch Sensing using the Enhance Capacitive Voltage Divider (CVD)
39 Analog Comparators (AC)
40 Digital-to-Analog Converter (DAC)
41 Timer/Counter (TC)
42 Timer/Counter for Control Applications (TCC)
43 Controller Area Network (CAN)
44 Universal Serial Bus (USB)
45 Ethernet Media Access Controller (ETH)
46 Quadrature Encoder Interface (QEI)
47 Low-Cost Controllerless (LCC)
48 802.15.4 Bluetooth® Radio Subsystem
49 Electrical Characteristics
50 Packaging Information
51 Appendix A: Regulatory Approval
52 Appendix B: Acronyms and Abbreviations
53 Document Revision History
Microchip Information

35.3 Block Diagram

Figure 35-1. I²C Single-Host Single-Client Interconnection

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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