17.12 Register Summary

See DSU module in the Product Memory Mapping Overview from Related Links for base address.

OffsetNameBit Pos.76543210
0x00CTRL7:0   CE   SWRST
0x01STATUSA7:0   PERRFAILBERRCRSTEXTDONE
0x02STATUSB7:0   HPEDCCD1DCCD0DBGPRESPROT

0x03

Reserved         
0x04ADDR7:0ADDR[5:0]AMOD[1:0]
15:8ADDR[13:6]
23:16ADDR[21:14]
31:24ADDR[29:22]
0x08LENGTH7:0LENGTH[5:0]  
15:8LENGTH[13:6]
23:16LENGTH[21:14]
31:24LENGTH[29:22]
0x0CDATA7:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x10DCC07:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x14DCC17:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x18DID7:0DEVSEL[7:0]
15:8DIE[7:0]
23:16FAMILY[0] SERIES[5:0]
31:24REVISION[3:0]FAMILY[4:1]
0x1CCFG7:0   ETBRAMENDCCDMALEVEL[1:0]LQOS[1:0]
15:8        
23:16        
31:24        

0x20

...

0x37

Reserved         
0x38UUID07:0UUID[7:0]
15:8UUID[15:8]
23:16UUID[23:16]
31:24UUID[31:24]
0x3CUUID17:0UUID[7:0]
15:8UUID[15:8]
23:16UUID[23:16]
31:24UUID[31:24]
0x40UUID27:0UUID[7:0]
15:8UUID[15:8]
23:16UUID[23:16]
31:24UUID[31:24]
0x44UUID37:0UUID[7:0]
15:8UUID[15:8]
23:16UUID[23:16]
31:24UUID[31:24]
0x48SECCFG7:0DEBUG_LCK[1:0]UUID_LCK[1:0]    
15:8    BOOT_KEY_LCK[1:0]ROOT_KEY_LCK[1:0]
23:16       ADD_BOOT_KEY
31:24        
0x4CCTR_STAT7:0ROLLBACK_CTR[7:0]
15:8        
23:16        
31:24        
0x50BOOT_STATUS7:0BOOT_STATUS[7:0]
15:8        
23:16        
31:24        
0x54BOOT_KEY07:0BOOT_KEY[7:0]
15:8BOOT_KEY[15:8]
23:16BOOT_KEY[23:16]
31:24BOOT_KEY[31:24]
...        
0x80BOOT_KEY117:0BOOT_KEY[7:0]
15:8BOOT_KEY[15:8]
23:16BOOT_KEY[23:16]
31:24BOOT_KEY[31:24]

0x84

...

0x0FFF

Reserved         
0x1000ENTRY07:0      FMTEPRES
15:8ADDOFF[3:0]    
23:16ADDOFF[11:4]
31:24ADDOFF[19:12]
0x1004ENTRY17:0      FMTEPRES
15:8ADDOFF[3:0]    
23:16ADDOFF[11:4]
31:24ADDOFF[19:12]
0x1008END7:0END[7:0]
15:8END[15:8]
23:16END[23:16]
31:24END[31:24]

0x100C

...

0x1FCB

Reserved         
0x1FCCMEMTYPE7:0       SMEMP
15:8        
23:16        
31:24        
0x1FD0PID47:0FKBC[3:0]JEPCC[3:0]
15:8        
23:16        
31:24        

0x1FD4

...

0x1FDF

Reserved         
0x1FE0PID07:0PARTNBL[7:0]
15:8        
23:16        
31:24        
0x1FE4PID17:0JEPIDCL[3:0]PARTNBH[3:0]
15:8        
23:16        
31:24        
0x1FE8PID27:0REVISION[3:0]JEPUJEPIDCH[2:0]
15:8        
23:16        
31:24        
0x1FECPID37:0REVAND[3:0]CUSMOD[3:0]
15:8        
23:16        
31:24        
0x1FF0CID07:0PREAMBLEB0[7:0]
15:8        
23:16        
31:24        
0x1FF4CID17:0CCLASS[3:0]PREAMBLE[3:0]
15:8        
23:16        
31:24        
0x1FF8CID27:0PREAMBLEB2[7:0]
15:8        
23:16        
31:24        
0x1FFCCID37:0PREAMBLEB3[7:0]
15:8        
23:16        
31:24