16.14 Quad Double Word Programming
The process for Quad Double Word programming is identical to Word programming except that all eight of the NVMDATAx registers are used. The value of the NVMDATA0 register is programmed at address NVMADDR and so on. Refer to the following code example for details.
Always perform the Quad Double Word programming on a Quad Double Word boundary so the user can ignore the NVMADDR address bits 3 through 0.
Quad Double Word programming only succeeds, if the target address is in a page that is not
write-protected. If programming a Quad Double Word, erase it before programming any word
in it again, even if changing a bit from an erased ‘1
’ state to a
‘0
’ state.
The value of 0x11111111 is programmed into location 0x1008000 and so on. Refer to the following code example for details.
The following example code provides details about the Quad Double Word programming.
…
// Set up Address and Data Registers
NVMADDR = 0x1008000; // physical address
NVMDATA0 = 0x11111111; // value written to 0x1008000
NVMDATA1 = 0x22222222; // value written to 0x1008004
NVMDATA2 = 0x33333333; // value written to 0x1008008
NVMDATA3 = 0x44444444; // value written to 0x100800C
NVMDATA4 = 0x55555555 // value written to 0x1008010
NVMDATA5 = 0x66666666 // value written to 0x1008014
NVMDATA6 = 0x77777777 // value written to 0x1008018
NVMDATA7 = 0x88888888 // value written to 0x100801C
// set the operation, assumes WREN = 0
NVMCONbits.NVMOP = 0x2; // NVMOP for Quad Double Word programming
// Enable Flash for write operation and set the NVMOP
NVMCONbits.WREN = 1;
// Start programming
NVMInitiateOperation(); // see Initiate NVM Operation (Unlock Sequence Example)
// Wait for WR bit to clear
while(NVMCON & NVMCON_WR);
// Disable future Flash Write/Erase operations
NVMCONbits.WREN = 0;
// Check Error Status
if(NVMCON & 0x3000) // mask for WRERR and LVDERR bits