19.4 Register Summary

See PMU module in the Product Memory Mapping Overview from Related Links for base address.


Offset	Name	Bit Pos.	6	2	1
0x00 ... 0x53	Reserved
0x54	WCMCFG	7:0
		15:8	SRAM2_CFG[2:0]	SRAM1_CFG[2:0]
		23:16
		31:24
0x58 ... 0x5F	Reserved
0x60	WCMSIZ	7:0
		15:8			SRAM1_SIZE[1:0]
		23:16
		31:24

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