16.21 Register Description

The following NVM control registers control the Flash program, erase and write protection operations:

  • NVMCON: Programming Control Register
    • This register is the control register for Flash program/erase operations. The following are the uses of this register:
      • Selects the operation to be performed
      • Initiates the operation
      • Provides status of the result after completing the operation
  • NVMCON2: Programming Control2 Register
    • This register is the control and status register for Flash program/erase operations.
  • NVMKEY: Programming Unlock Register
    • This is a write-only register that helps to or that helps the user to implement an unlock sequence to help prevent accidental writes/erasures of Flash memory and write permission settings.
  • NVMADDR: Flash Address Register
    • This register stores the physical target address for row, Quad Double Word and Single Double Word programming as well as page erasing.
  • NVMDATAx: Flash Program Data Register (x = 0-3)
    • These registers hold the data to be programmed during Flash Word program operations.
  • NVMSRCADDR: Source Data Address Register
    • This register points to the physical address of the data to be programmed when executing a row program operation.
  • NVMPWPLT: Flash Program Write Protect Lower Register
    • This register sets the program flash pages lower than provided address as a write protected.
  • NVMPWPGTE: Flash Program Write Protect Greater Register
    • This register sets the program flash pages greater than provided address as a write protected.
  • NVMLBWP: Flash Boot Write Protect Register
    • This register sets the boot flash partition pages as a write protected.

The following is the list of conventions available in the register description:

  • – R = Readable bit
  • – W = Writable bit
  • – U = Unimplemented bit, read as ‘0
  • – -n = Value at POR
  • 1 = Bit is set
  • 0 = Bit is cleared
  • – x = Bit is unknown
  • HS = Hardware Set
  • HC = Hardware Cleared