16.20 Register Summary
See FC module in the Product Memory Mapping Overview from Related Links for the base address.
Note: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See CLR, SET and INV Registers from Related Links.
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x00 | NVMCON | 7:0 | NVMOP[3:0] | |||||||
| 15:8 | WR | WREN | WRERR | LVDERR | ||||||
| 23:16 | ||||||||||
| 31:24 | ||||||||||
0x04 ... 0x0F | Reserved | |||||||||
| 0x10 | NVMCON2 | 7:0 | NVMPREPG | |||||||
| 15:8 | CREAD1 | VREAD1 | RETRY[1:0] | |||||||
| 23:16 | WS[4:0] | |||||||||
| 31:24 | ERS[3:0] | SLEEP | ||||||||
0x14 ... 0x1F | Reserved | |||||||||
| 0x20 | NVMKEY | 7:0 | NVMKEY[7:0] | |||||||
| 15:8 | NVMKEY[15:8] | |||||||||
| 23:16 | NVMKEY[23:16] | |||||||||
| 31:24 | NVMKEY[31:24] | |||||||||
0x24 ... 0x2F | Reserved | |||||||||
| 0x30 | NVMADDR | 7:0 | NVMADDR[7:0] | |||||||
| 15:8 | NVMADDR[15:8] | |||||||||
| 23:16 | NVMADDR[23:16] | |||||||||
| 31:24 | NVMADDR[31:24] | |||||||||
0x34 ... 0x3F | Reserved | |||||||||
| 0x40 | NVMDATA0 | 7:0 | NVMDATA[7:0] | |||||||
| 15:8 | NVMDATA[15:8] | |||||||||
| 23:16 | NVMDATA[23:16] | |||||||||
| 31:24 | NVMDATA[31:24] | |||||||||
0x44 ... 0x4F | Reserved | |||||||||
| 0x50 | NVMDATA1 | 7:0 | NVMDATA[7:0] | |||||||
| 15:8 | NVMDATA[15:8] | |||||||||
| 23:16 | NVMDATA[23:16] | |||||||||
| 31:24 | NVMDATA[31:24] | |||||||||
0x54 ... 0x5F | Reserved | |||||||||
| 0x60 | NVMDATA2 | 7:0 | NVMDATA[7:0] | |||||||
| 15:8 | NVMDATA[15:8] | |||||||||
| 23:16 | NVMDATA[23:16] | |||||||||
| 31:24 | NVMDATA[31:24] | |||||||||
0x64 ... 0x6F | Reserved | |||||||||
| 0x70 | NVMDATA3 | 7:0 | NVMDATA[7:0] | |||||||
| 15:8 | NVMDATA[15:8] | |||||||||
| 23:16 | NVMDATA[23:16] | |||||||||
| 31:24 | NVMDATA[31:24] | |||||||||
0x74 ... 0x7F | Reserved | |||||||||
| 0x80 | NVMDATA4 | 7:0 | NVMDATA[7:0] | |||||||
| 15:8 | NVMDATA[15:8] | |||||||||
| 23:16 | NVMDATA[23:16] | |||||||||
| 31:24 | NVMDATA[31:24] | |||||||||
0x84 ... 0x8F | Reserved | |||||||||
| 0x90 | NVMDATA5 | 7:0 | NVMDATA[7:0] | |||||||
| 15:8 | NVMDATA[15:8] | |||||||||
| 23:16 | NVMDATA[23:16] | |||||||||
| 31:24 | NVMDATA[31:24] | |||||||||
0x94 ... 0x9F | Reserved | |||||||||
| 0xA0 | NVMDATA6 | 7:0 | NVMDATA[7:0] | |||||||
| 15:8 | NVMDATA[15:8] | |||||||||
| 23:16 | NVMDATA[23:16] | |||||||||
| 31:24 | NVMDATA[31:24] | |||||||||
0xA4 ... 0xAF | Reserved | |||||||||
| 0xB0 | NVMDATA7 | 7:0 | NVMDATA[7:0] | |||||||
| 15:8 | NVMDATA[15:8] | |||||||||
| 23:16 | NVMDATA[23:16] | |||||||||
| 31:24 | NVMDATA[31:24] | |||||||||
0xB4 ... 0xBF | Reserved | |||||||||
| 0xC0 | NVMSRCADDR | 7:0 | NVMSRCADDR[7:0] | |||||||
| 15:8 | NVMSRCADDR[15:8] | |||||||||
| 23:16 | NVMSRCADDR[23:16] | |||||||||
| 31:24 | NVMSRCADDR[31:24] | |||||||||
0xC4 ... 0xCF | Reserved | |||||||||
| 0xD0 | NVMPWPLT | 7:0 | PWPLT[7:0] | |||||||
| 15:8 | PWPLT[15:8] | |||||||||
| 23:16 | PWPLT[23:16] | |||||||||
| 31:24 | ULOCK | |||||||||
0xD4 ... 0xDF | Reserved | |||||||||
| 0xE0 | NVMPWPGTE | 7:0 | PWPGTE[7:0] | |||||||
| 15:8 | PWPGTE[15:8] | |||||||||
| 23:16 | PWPGTE[23:16] | |||||||||
| 31:24 | ULOCK | |||||||||
0xE4 ... 0xEF | Reserved | |||||||||
| 0xF0 | NVMLBWP | 7:0 | LBWP[7:0] | |||||||
| 15:8 | LBWP[15:8] | |||||||||
| 23:16 | LBWP[17:16] | |||||||||
| 31:24 | ULOCK | |||||||||