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16.2 Features
Flash Controller
- PB-Bridge-D Interface that Provides Access to the Flash Controller Registers
- AHB Initiator for Bus Hosted Reads the Row Programming Data from SRAM
- Write Protect for Program Flash (PFM)
- Single page protection resolution
- Protect < Address
- Protect ≥ Address
- Individual Page Write Protection for Boot Flash (BFM)
- Error Correction Code Support
- Supports Chip and Page Erase
- Supports Double Word, Quad Double Word and Row Program Options
- Supports Flash Erase/Retry to Increase Retention and Endurance
Flash Memory
- 256-Bit Wide Flash Memory Access
- 4 Kbytes Page Size
- Row Size is 1 KB (256 Word)
- Flash-Based One-Time-Programmable (OTP) Page. The Flash controller allows the Flash
memory to be accessed through the following methods:
- Run-Time Self-Programming (RTSP)
- Serial Wire Debug (SWD) programming using DSU
- Flash Word is 256 Bits