9.2 Physical Memory Map

The high-speed bus is implemented as a bus matrix. All high-speed bus addresses are fixed, and they are never remapped in any way, even during boot.
Table 9-1. Physical Memory Map
MemoryStart AddressSize
PIC32CX2051BZ6/PIC32WM-BZ6
Boot ROM0x0000000064 KB
Boot Flash0x0080000064 KB
Embedded Program Flash0x010000002048 KB
Embedded SRAM0x20000000512 KB
Peripheral Bridge A0x40000000128 KB
Peripheral Bridge B0x41000000
Peripheral Bridge C0x42000000
Peripheral Bridge PIC0x44000000
Peripheral Bridge D0x46000000
eFuse—3072 bits