24.5 Register Description

Some peripherals include module enable bits internally. The PMD bit is used for clock gating of the PBx_CLK and GCLK for all peripherals. If the peripheral also includes the internal enable bit, the PMD bit and internal enable Configuration bit must be configured by software for that peripheral.

The following table summarizes each peripheral's enable and disable controls. For more details on the internal enable/disable control, see Peripheral Access Controller (PAC) from Related Links.

Table 24-1. Module Enable/Disable Controls
ModulePMD ControlModule ControlEnable/Disable Strategy
ACPresentPresentDisable at PMD or Module
ADCPresentPresentDisable at PMD or Module
CCLNAPresentDisable at Module
CVDPresentPresentDisable at PMD or Module
CMCCNAPresentDisable at Module
DMACNAPresentDisable at Module
DSUNANAAlways Enabled (Dynamic ON/OFF)
EICNAPresentDisable at Module
EVSYSNANAAlways Enabled (Dynamic ON/OFF)
FREQMNAPresentDisable at Module
PACNANAAlways Enabled (Dynamic ON/OFF)
RAMECCNANADisabled by default
SERCOMPresentPresent based on VSELDisable at PMD or Module
TCPresentPresentDisable at PMD or Module
TCCPresentPresentDisable at PMD or Module
CANnPresentPresent based on VSELDisable at PMD or Module
USBPresentPresent based on VSELDisable at PMD or Module
ETHPresentPresent based on VSELDisable at PMD or Module
ADCSARHRPresentPresentDisable at PMD or Module
ADCSARPresentPresentDisable at PMD or Module
DACPresentPresentDisable at PMD or Module
QEIPresentPresentDisable at PMD or Module
Note: For modules with both PMD control and Module control, Enable = PMDx = 0 AND Module Enable = 1, Disable = PMDx = 1 OR Module Enable = 0.