3 DAC Operation

Illustrated below is the detailed architecture of the 5-bit DAC module. It can be enabled by setting the EN bit.
Figure 3-1. Detailed Architecture of 5-Bit DAC

The DAC has 32 voltage levels which are set with the DAC1R [4:0] bits of the DAC1CON1 register. The DAC output voltage is derived from the parameters VREF+, VREF-, 5-bit DAC input, and 32 voltage levels.

The internal structure of the DAC module is comprised of a 32-to-1 multiplexer and a 32-steps resistor ladder. The resistor ladder is a string of identical resistors connected to the multiplexer, as shown above. One end of the resistor ladder is connected to the positive input source (Vsource+) and the other, to negative input source (Vsource-). With this architecture, Vsource+ to Vsource– is divided into 32 equal steps. The DAC output value is derived from the resistor ladder and if the voltage of either input source fluctuates, this would result in fluctuations in the DAC output value. The DAC output voltage can be routed to the DACxOUTn pins and to other peripherals by setting the respective control register bits. Reading the DACxOUTn pin when it is configured for the DAC reference voltage output will always return a ‘0’.

The DAC output can be determined by using the following equation:

D A C x _ o u t p u t = [ ( V R E F + − V R E F − ) × D A C R [ 4 : 0 ] 2 5 ] + V R E F −
For example, the parameters configuration and DAC inputs:
  • VREF+ = 5V
  • VREF- = 0V
  • DACR [4:0] = 31 (Maximum)
  • 25 = 32
  • DACx_output = [(5 - 0) x 31 / 32] + 0 = 4.843V

Thus, the 5-Bit DAC can provide a maximum output voltage of 4.843V