1 Silicon Issue Summary

Legend

-
Erratum is not applicable.
X
Erratum is applicable.
PeripheralShort DescriptionValid for Silicon Revision
Rev. A
Device Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents Automatic Loading of Calibration Values X
ADC ADC Stays Active in Sleep Modes for Low Latency Mode and Free Running Mode X
CCL The CCL Must be Disabled to Change the Configuration of a Single LUT X
NVMCTRL Wrong Reset Value of NVMCTRL.CTRLA Register X
TCA Restart Will Reset Counter Direction in NORMAL and FRQ Mode X
TCB CCMP and CNT Registers Act as 16-Bit Registers in 8-Bit PWM Mode X
USART Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode X
Receiver Non-Functional after Detection of Inconsistent Synchronization Field X