5 Data Memory
This section explains the data memory in dsPIC33AK256MPS306 devices. The dsPIC33AK256MPS306 features a data width of 32 bits. All internal registers and data space memory are organized to be 32 bits wide. The data spaces can be accessed as a single 64 Kbyte linear address range. Data memory is accessed through Address Generation Units (AGUs) and separate data paths.
The dsPIC33AK256MPS306 device family incorporates ECC support for data read/write and forced fault injection capability for use by functional safety focused customers. The ECC controller provides interrupt output for single and double-bit errors.
The following data memory features are implemented:
- Three Address Generation Units: Two for Read and One for Write
- Two SRAM Data Blocks for Independent Read and Write
- ECC Support for Data Read and Write
- ECC Provides Interrupt Output for Single and Double-Bit Errors
- Forced Fault Injection Capability for Use by Functional Safety Focused Customers
