28.4.6 Sync and Triggered Operation

Synchronized (Sync) and Triggered mode operations can be thought of as Complementary modes that affect the operation of the CCPxTMR registers in most of the module’s major operating modes. Both use the SYNC[4:0] bits (CCPxCON1[20:16]) to determine the input signal source. The difference is how that signal affects the timer.

In Sync mode operation, the timer counts freely when enabled by the CCPON bit and is reset to zero when the input, selected by SYNC[4:0], is asserted. The timer immediately begins to count again from zero unless it is held for some other reason. Sync operation is used whenever the TRIGEN bit (CCPxCON1[23]) is cleared.

In Triggered mode operation, the timer is held in Reset until the input selected by SYNC[4:0] is asserted; when this occurs, the timer starts counting and continues to count until the TRCLR bit (CCPxSTAT[5]) is set. Triggered operation is used whenever the TRIGEN bit is set.

Depending on the specific device, the SYNC[4:0] bits allow for the selection of up to 32 internal or external sources. Some implemented sources may be available for triggered operation but not for sync operation. In addition, ‘11111’ (free-running counter) is not valid for sync operation.

Sync and trigger operations play a major role in the module’s operation in Timer and Output Compare modes by allowing the chained and synchronized operation of multiple modules.