29.9 CLB Configuration

The CLB module must be completely configured before use. The Microchip CLB Synthesizer allows configuration of all CLB parameters using a netlist which is stored in Program Memory. The NVM Scanner transfers the netlist from Program Memory into the CLB latches and Look-Up Tables (LUTs).

Important: The module configuration that is developed using the Microchip CLB Synthesizer must be loaded to program memory with the NVM scanner before setting the Enable (EN) bit.
Configuration of the CLB consists of the following steps:
  1. Configure the CLB using the Microchip CLB Synthesizer:
    • Select the inputs into the CLB using the CLB Input Selection latches
    • Configure the Edge Detectors using the CLB Input Synchronizer latches
    • Select the inputs into the BLEs using the BLE Input Selection latches
    • Configure the BLE LUTs with entries corresponding to each expected input combination using the CLB LUT latches
    • Configure the BLE output flops using the BLE Flop Select latches
    • Configure the CLB interrupts using the CLB Interrupt Selection latches
    • Determine which BLE output is routed to the eight PPS outputs using the CLB Output Selection latches
    • Select the BLE outputs that control the Counter Stop and Counter Reset values using the Counter Stop and Counter Reset Control latches, respectively.
    • Determine which counter bit is connected to the respective BLE Input using the Counter Output Selection latches
    • Configure the CLB clock divider using the CLB Clock Divider latches
    • Transfer the netlist to Program Memory using the Microchip CLB Synthesizer
  2. Select the CLB clock source using the CLBCLK register.
  3. Configure the NVM Scanner to interact with the CLB module (refer to the “CRC” chapter for more details).
  4. Enable the scanner to load the CLB netlist values into the CLB latches.
  5. Once the scanner has loaded the CLB configuration into NVM, enable the CLB module by setting the EN bit.

The outputs of the CLB can be viewed through external pins via PPS, or by reading the CLBSWOUTH and CLBSWOUTL registers. The CLB outputs are also internally connected to other peripherals.