29.3 Dedicated 3-Bit Counter

Most hardware-based state machine designs require a counter as part of the design. The CLB module provides a dedicated 3-bit hardware counter. The counter is enabled via the Microchip CLB Synthesizer.

The Counter Stop and Counter Reset selections are configurable through the Microchip CLB Synthesizer. The Counter can be stopped or reset by any of the 32 BLE outputs (see below), and is clocked by the output of the CLB clock divider (BLE_clk) (see the "CLB Clock Selection" section).

Each bit of the counter is available as an input to each of the BLEs. The Counter[nx] Output Selection Latches determine which count bit is connected to the respective BLE Input 'n' Latches, and are programmable through the Microchip CLB Synthesizer.

Figure 29-2. 3-Bit Counter Block Diagram