Configurable Logic Block Input PPS Register
| Name: | CLBINxPPS |
| Offset: | 0x1E58,0x1E59,0x1E5A,0x1E5B |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PORT[3:0] | PIN[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
| Name: | CLBINxPPS |
| Offset: | 0x1E58,0x1E59,0x1E5A,0x1E5B |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PORT[3:0] | PIN[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
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