6.4 Software Features and Enhancements

The Insights menu has the new option Logic Level Distribution option. When this option is selected, every stack/bar in the distribution chart represents the number of paths that have a logic count equal to the bar number.

Restructured the SmartPower Frequency and Probability tables to load data dynamically. Memory and Runtime improvements are observed in SmartPower GUI for larger designs. The improvements are about 25% for memory and 15% for run-time.

SmartFusion2, IGLOO2, PolarFire, RT PolarFire, and PolarFire SoC allow you to unlock the Debug features on the device programmed in HSM Flow. Devices that are programmed in HSM Flow have their plain text passkey match operation disabled, which prevents you from unlocking (matching DPK) without HSM.

The Synplify Pro and Identify tools bundled in Libero SoC v2022.3 have been upgraded to SynplifyPro S-2021.09M-SP2 and Identify Debugger S-2021.09M-SP2 versions. Key enhancements are:

• Post Synthesis netlist has been enhanced for VHDL constructs that have real number subtraction to eliminate post-synthesis simulation and functional mismatches vs. pre-synthesis RTL simulations.
• SynplifyPro supports URAM inference for array initialization constructs with memory depth of 2 with the syn_ramstyle attribute set to uram.
• VM netlist with long wire names has been simplified.

Starting with Libero SoC v2022.3, the Libero SoC Linux installation creates a Libero shortcut on the display.