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Axcelerator Family FPGAs Datasheet
Axcelerator Family FPGAs Datasheet
  1. Home
  2. 1 General Description
  3. 1.4 Related Documents
  4. 1.4.1 Application Notes

  • Introduction
  • 1 General Description
    • 1.1 Device Architecture
    • 1.2 Design Environment
    • 1.3 Summary
    • 1.4 Related Documents
      • 1.4.1 Application Notes
      • 1.4.2 User’s Guides and Manuals
      • 1.4.3 White Paper
      • 1.4.4 Libero
  • 2 Electrical Specifications
  • 3 Package Pin Assignments
  • 4 Revision History
  • Microchip Information

1.4.1 Application Notes

The following is the list of related application notes:

  • Simultaneous Switching Noise and Signal Integrity
  • Axcelerator Family PLL and Clock Management
  • Implementation of Security in Actel Antifuse FPGAs

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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