1.1.4 I/O Logic
The Axcelerator family of FPGAs features a flexible I/O structure, supporting a range of mixed voltages with its bank-selectable I/Os: 1.5V, 1.8V, 2.5V, and 3.3V. In all, Axcelerator FPGAs support at least 14 different I/O standards (single-ended, differential, and voltage-referenced). The I/Os are organized into banks with eight banks per device (two per side). The configuration of these banks determines the I/O standards supported (For more information, see User I/Os2 ). All I/O standards are available in each bank.
Each I/O module has an input register (InReg), an output register (OutReg), and an enable register (EnReg) (see the following figure). An I/O Cluster includes two I/O modules, four RX modules, two TX modules, and a buffer (B) module.